Linux CE for MIPS-based Devices


NOTE (28-Oct-01): These pages are no longer being maintained, and much of the info is 1-2 years out of date.


The Linux CE effort is aimed at porting the Linux kernel and supporting applications to the various platforms that are supported by Microsoft's Windows CE operating system. You used to be able to find more information at, which was the official Linux CE page, but the domain name lapsed and that URL is now a porno site.... The the Linuxce FAQ is still around, though.

This page is only concerned with the MIPS portion of Linux CE. SH3 and StrongARM platforms are being worked on by others. Within the MIPS category of WinCE devices are actually several families of MIPS CPUs produced by various manufacturers. See Warner's Mips based PDA info Center for a list of which CPU is used in various brands of PalmPC and HandheldPC, and also Christopher Curzio's Linux CE page for a more in-depth description of what's in each device. The two most popular CPUs seem to be the NEC VR41xx family, used in the Casio Cassiopeia and Everex Freestyle (and others), and the Philips PR31700, used in the Philips Nino (and others). The Toshiba R39xx family is also used in some WinCE devices, but these chips are apparently very similar, if not equivelant to members of the Philips Poseidon family of CPUs, such as PR31700. There are probably WinCE devices based on other families of MIPS CPUs as well.

Although each of these families is based on a MIPS CPU core, they define their peripheral registers differently. Because of this, the MIPS portion of Linux CE is further divided into separate platforms, one for each CPU family. Devices that share the same CPU family, such as the Cassiopeia and Freestyle, can use most of the same platform-specific code because almost everything is built into the CPU and 1 or 2 support chips, but there are device-specifics that also need to be addressed.

The Philips Poseidon parts are based on a MIPS R3000 core, while the NEC VR41xx parts are R4000 core with some parts missing. The exception handling code and the TLB-related code are R4000-style, but like an R3000 it lacks the LL/SC instruction pair used to do atomic accesses in the MIPS kernel. In some cases, VR41xx is like neither R3000 nor R4000, for example the ability to handle a 1K page size. Both Poseidon and VR41xx lack floating point coprocessors.

How You Can Help

Unfortunately, the old development mailng list is dead, as it was hosted at I don't have any better pointers than that. Sorry.

Legal Stuff:

Microsoft and Windows are registered trademarks of Microsoft Corporation. VR4100, VR4101, VR4102, VR4111, VR4121, and VR Series are trademarks of NEC Corporation. MIPS is a trademark of MIPS Technologies, Inc. All other brands and product names may be trademarks of their respective owners.

Last modified: 27-Nov-2001 (but last significant mod was on 20-Feb-2000)